MEGARAM&MEGAROMカートリッジをMSX用につくる

MSXに1MビットRAM(00000-1FFFF)と1MビットROM(00000-1FFFF)をつないで74HC161でMEGARAM&MEGAROMカートリッジをつくりたい。

http://www7b.biglobe.ne.jp/~leftyserve/delusion/del_sulr.htm

メガラムモード(RAMROM=0)では、RAMの64KB(0000-FFFF)を増設しつつ、RAMの16KB(8000-BFFF)をバンク切り替えできるようにします。

Address  A15 A14 A13| /CE1 A16 A15 A14 A13 RAM
>0000    0   0   0  |  0   0   1   0   0   >08000
>2000    0   0   1  |  0   0   1   0   1   >0A000
>4000    0   1   0  |  0   0   1   1   0   >0C000
>6000    0   1   1  |  0   0   1   1   1   >0E000
>8000    1   0   0  |  0   *   *   *   0   >00000...>1D000
>A000    1   0   1  |  0   *   *   *   1   >02000...>1E000
>C000    1   1   0  |  0   1   0   1   0   >04000
>E000    1   1   1  |  0   1   0   1   1   >06000

メガロムモード(RAMROM=1)では、RAMの48KB(0000-7FFF/C000-FFFF)を増設しつつ、ROMの16KB(8000-BFFF)をバンク切り替えできるようにします。

Address  A15 A14 A13| /CE1 A16 A15 A14 A13  RAM|/CE2 A16 A15 A14 A13 ROM
>0000    0   0   0  |  0   0   1   0   0 >08000|  1   -   -   -   -
>2000    0   0   1  |  0   0   1   0   1 >0A000|  1   -   -   -   -
>4000    0   1   0  |  0   0   1   1   0 >0C000|  1   -   -   -   -
>6000    0   1   1  |  0   0   1   1   1 >0E000|  1   -   -   -   -
>8000    1   0   0  |  1   0   0   0   0   -   |  0   *   *   *   0  >00000...>1D000
>A000    1   0   1  |  1   0   0   0   1   -   |  0   *   *   *   1  >02000...>1E000
>C000    1   1   0  |  0   0   0   1   0 >04000|  1   -   -   -   -
>E000    1   1   1  |  0   0   0   1   1 >06000|  1   -   -   -   -
;
; MEGARAM.EQN - SST39SF010 MSX MEGARAM & MEGAROM
;

TITLE SST39SF010 MSX MEGARAM & MEGAROM
PATTERN A
REVISION 1.0
AUTHOR TANAM1972
COMPANY PARALLEL COMPUTER INC
DATE 10/8/18

CHIP SST39SF010 GAL22V10D

NC A15I A14I A13I A12I A16O A15O A14O FFFF_n MERQ_n SLTSL_n GND
RAMROM CE1_n CE2_n A16 A15 A14 NC NC LD_n A15_n NC VCC

EQUATIONS

LD_n = SLTSL_n + MERQ_n + FFFF_n +/A15I + /A14I + /A13I + /A12I

CE1_n = SLTSL_n + MERQ_n + A15 * /A14 * RAMROM + /A15 * A14 * RAMROM
CE2_n = SLTSL_n + MERQ_n + A15 * A14 + /A15 * /A14 + /RAMROM A16 = A16O * A15 A15 = A15O * A15 A14 = A14O + A14

A15_n = /A15
;
; MEGAROM.EQN - DECODER MSX MEGARAM & MEGAROM
;

TITLE DECODER MSX MEGARAM & MEGAROM
PATTERN A
REVISION 1.0
AUTHOR TANAM1972
COMPANY PARALLEL COMPUTER INC
DATE 10/8/18

CHIP DECODER GAL22V10D

NC A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 GND
A1 FFFF_n NC NC NC NC NC NC NC NC NC VCC

EQUATIONS

FFFF_n = /A11 + /A10 + /A9 + /A8 +/A7 + /A6 + /A5 + /A4 + /A3 + /A2 + /A1

回路図

       TC551001CP GAL22V10D MSX  SST39SF010 74HC161 GAL22V10D
FFFF_n FFFF_n
MERQ_n /MERQ
SLTSL_n /SLTSL
A15I A15
A14I A14
CE2_n /CE PIN 1 NC   A15 A15
PIN 2 A16 A16 A16 PIN 3 A14 A14 A14 PIN 4 A12 A12I A12 A12 PIN 5 A7 A7 A7 A7 PIN 6 A6 A6 A6 A6 PIN 7 A5 A5 A5 A5 PIN 8 A4 A4 A4 A4 PIN 9 A3 A3 A3 A3 PIN10 A2 A2 A2 A2 PIN11 A1 A1 A1 A1 PIN12 A0 A0 A0 PIN13 D0 D0 D0 A PIN14 D1 D1 D1 B PIN15 D2 D2 D2 C PIN16 GND GND GND GND GND|EP|ET PIN17 D3 D3 D3 D PIN18 D4 D4 D4 PIN19 D5 D5 D5 PIN20 D6 D6 D6 PIN21 D7 D7 D7 PIN22 /CE CE1_n PIN23 A10 A10 A10 A10 PIN24 /OE /RD /OE PIN25 A11 A11 A11 A11 PIN26 A9 A9 A9 A9 PIN27 A8 A8 A8 A8 PIN28 A13 A13I A13 A13 PIN29 R/W /WR /WE CK PIN30 CE2 VCC PIN31 A15 A15_n
PIN32 VCC VCC VCC VCC VCC|/RES
  LD_n /LD
A14O QA A15O QB A16O QC NC QD
SW1
|
SW2